View Q67000-A8368-A205_820849.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

t = new type type ordering code package t tda 4862 Q67000-A8368-A205 p-dip-8-1 t tda 4862 g q67006-a8369-a703 p-dso-8-1 power-factor controller (pfc) tda 4862 ic for high power factor and active harmonic filter advanced information bipolar ic p-dip-8-1 p-dso-8-1 features ? ic for sinusoidal line-current consumption ? power factor approaching 1 ? controls boost converter as an active harmonics filter ? internal start-up with low current consumption ? zero current detector for discontinuous operation mode ? high current totem pole gate driver ? trimmed 1.4% internal reference ? undervoltage lock-out with hysteresis ? very low start-up current consumption ? pin compatible to world standard ? fast overvoltage regulator ? current sense input with internal low pass filter semiconductor group 1 1998-02-16
tda 4862 semiconductor group 2 1998-02-16 description the tda 4862 is excellent convenient for designing a preconverter in ballasts and switched mode power supplies with sinusoidal line current consumption and a power factor approaching unity. the tda 4862 controls a boost converter as an active harmonics filter in a discontinuous mode (free oscillating triangular shaped current mode). the tda 4862 comprises an internal start-up timer, a high gain voltage amplifier, an one quadrant multiplier for approaching unity power factor, a zero current detector, pwm and logic circuitry, and totem pole mosfet gate driver. protective features are: input undervoltage lockout with hysteresis, v cc zener clamp, cycle-by-cycle current limiting, output voltage limiting for fast and slow load changes up to open circuit, and a sinking gate driver current activated whenever undervoltage mode occurs. the output voltage of this preconverter is regulated with high accuracy. therefore the device can be used for world-wide line voltages without switches. the tda 4862 is the improved version of the tda 4817 with a pinout equivalent to world standard. figure 1 pin configuration (top view) tda 4862 tda 4862 g multin 4 3 2 1 iep01748 5 6 gnd detin 7 8 gtdrv v cc aout v sense v sense i 4 3 2 1 iep01749 5 6 7 8 sense i multin aout v sense v cc v gtdrv gnd detin
tda 4862 semiconductor group 3 1998-02-16 pin definitions and functions pin symbol function 1 v sense voltage amplifier inverting input; v sense is connected via a resistive divider to the boost converter output. with a capacitor connected to v aout it forms an integrator. 2 v aout voltage amplifier output; v aout is connected internally to the first multiplier input. to prevent overshoot the input voltage will be clamped at 5 v. input voltage less than 2.2 v is inhibiting the gate driver. if the current flowing into this pin is exceeding an internal defined margin the multiplier output voltage is reduced to prevent the mosfet from overvoltage damage. 3 multin multiplier input; multin is the second multiplier input and connected via a resistive divider to the rectifier output voltage. 4 i sense current sense minus; i sense is connected to a sense resistor controlling the mosfet source current. the input is internally clamped at C 0.3 v to prevent negative input voltage interaction. an internal low pass filter suppresses voltage spikes when turning the mosfet on. 5 detin zero current detector input; detin is connected to an auxiliary winding monitoring the zero crossing of the inductor current. 6 gnd ground; all voltages are measured with respect to gnd. v cc should be bypassed directly to gnd with a 0.1 m f or larger ceramic capacitor. 7 gtdrv gate drive output; gtdrv is the output of a totem-pole circuitry for direct driving a mosfet. a clamping network bypasses low state source current and high state sink current. 8 v cc positive supply voltage; v cc should be connected to a stable source slightly above the v cc turn-on threshold for normal operation. a 100 nf or lager ceramic capacitor connected to v cc absorbs supply current spikes required to charge external mosfet gate capacitances.
tda 4862 semiconductor group 4 1998-02-16 functional description introduction conventional electronic ballasts and switching power supplies are designed with a bridge rectifier and bulk capacitor. their disadvantage is that the circuit draws power from the line when the instantaneous ac voltage exceeds the capacitors voltage. this occurs near the line voltage peak and causes a high charge current spike with following characteristics: the apparent power is higher than the real power that means low power factor condition, the current spikes are non-sinusoidal with a high content of harmonics causing line noise, the rectified voltage depends on load condition and requires a large bulk capacitor, special efforts in noise suppression are necessary. with the tda 4862 preconverter a sinusoidal current is achieved which varies in direct instantaneous proportion to the input voltage half sine wave and means a power factor near 1. this is due to the appearance of almost any complex load like a resistive one at the ac line. the harmonic distortions are reduced and comply with the iec555 standard. operating description the tda 4862 contains a wide bandwidth voltage amplifier used in a feedback loop, an overvoltage regulator, an one quadrant multiplier with a wide linear operating range, a current sense comparator, zero current detector, a pwm and logic circuitry, a totem-pole mosfet driver, an internal trimmed voltage reference, a restart timer and an undervoltage lockout circuitry. these functional blocks are described below. voltage amplifier the voltage amplifier is internally compensated and yields a gain bandwidth of 0.8 mhz and a phase margin of 80 degrees. the non-inverting input is biased at 2.5 v and is not pinned out. the inverting input is sensing the output voltage via a resitive devider. the voltage amplifier output v aout and the inverting input v sense are connected in a simplest way via an external capacitor. it forms an integrator which monitors the average output voltage over several line cycles. typically the bandwidth is set below 20 hz. ln order to keep the output voltage constant the voltage amplifier output is connected to the multiplier input for regulation. overvoltage regulator fast changes of the output voltage cant be regulated by the integrator formed with the voltage amplifier this occurs during initial start-up, sudden load removal, or output arcing and leads to a current peak at the voltage amplifier input while the voltage amplifiers differential input voltages remains zero. the peak current is flowing through the external capacitor into v aout . exceeding an internal defined margin causes a regulation circuitry to reduce the multiplier output voltage.
tda 4862 semiconductor group 5 1998-02-16 functional description (contd) muitiplier a one quadrant multiplier is the crucial circuitry that regulates the gate driver with respect of the dc output voltage and the ac haversine input voltage of the preregulator. both inputs are designed for good linearity over a wide dynamic range, 0 v to 4.0 v for the multin and 2.5 v to 4.0 v for the v aout . current sense comparator and rs latch the multiplier output voltage is compared with the current sense voltage which represents the current through the mosfet. the current sense comparator in addition with the logic ensures that only a single pulse appears at the drive output during a given cycle. the multiplier output and the current sense threshold are internally clamped at 1.3 v. so the gate drive mosfet is protected against critical operating, as they occur during start up. to prevent the input from negative pulses a special protection circuitry is implemented. switch-on current peaks are reduced by an internal rc-filter. zero current detector the zero current detector senses the inductor current via an auxiliary winding and ensures that the next on-time is initiated immediately when the inductor current has reached zero. this diminishes the reverse recovery losses of the boost converter diode. output switch conduction is terminated when the voltage drop of the shunt resistor reaches the threshold level of the multiplier output. so the boost current waveform has a triangular shape and there are no deadtime gaps between the cycles. this leads to a continuous ac line current limiting the peak current to twice of the average current. to prevent false tripping the zero current detector is designed as a schmitt trigger with a hysteresis of 0.6 v. an internal 5 v clamp protects the input from overvoltage breakdown, a 0.6 v clamp prevents substrate injection. an external resistor must be used in series with the auxiliary winding to limit the current through the clamps. timer a restart timer function was added to the ic to eliminate the need for an oscillator when used in stand-alone applications. the timer starts or restarts the tda 4862 if the drive output has been off for more than 15 m s after the inductor current reaches zero.
tda 4862 semiconductor group 6 1998-02-16 functional description (contd) undervoltage lockout an undervoltage lockout circuitry enables the output stage when v cc reaches the upper threshold v cc and terminates the output stage when v cc is falling below the lower threshold v ccl . in the standby mode the supply current is typically 75 m a. an internal clamp has been added from v cc to ground to protect the ic from an overvoltage condition. the external circuitry is created with a start-up resistor connected from v cc to the input supply voltage and a storage capacitor from v cc to ground. bootstrap power supply is created with the previous mentioned auxiliary winding and a diode. output the tda 4862 totem pole output stage is mosfet compatible. an internal protection circuitry is activated when v cc is within the stand by mode and ensures that the mosfet is turned-off. the totem pole output has been optimized to minimize cross conduction current during high speed operation. the addition of two 4 w resistors, one in series with the source output transistor and one in series with the sink output transistor, reduces the cross conduction current.
tda 4862 semiconductor group 7 1998-02-16 figure 2 block diagram over- voltage regulation multi- plier 4 v 0.9 v 1.3 v 30 k 10 pf 5 v 0.6 v driver and logic reference voltage z-clamp v cc- ref v cc v clamp clamp current comp voltage amplifier lockout undervoltage filter clamp detector + 11 v / 8.5 v 2.5 v / 1.9 v + tda 4862; g 1 2 3 4 5 6 7 8 gnd gtdrv cc v aout v multin detin ieb01747 sense v sense i w
tda 4862 semiconductor group 8 1998-02-16 figure 3 application circuit with tda 4862; g 0.22 f c 1 tr1 250 h detector multin gnd gtdrv buz 334 q1 c 470 f 6 detin aout v ref v 2 6 3 4 1 7 85 v in ac 90-270 v v th ies01750 rf-filter and rectifier multi- pler m m 100 f c 3 m c 100 nf 4 + + voltage op + current op 1.3 m r 1 w 100 k r w 3 r 12 k 2 w r 100 8 w d1 1n4148 r 22 k 3 w pwm logic driver tda 4862 g 1.6 m r w 5 10 k r 6 w r 7 w 0.1 v sense sense i byp 101 d2 c 5 400 v m out v 470 nf
tda 4862 semiconductor group 9 1998-02-16 operating range 1) v ccon means v cch has been exceeded but the supply voltage is still above v ccl . the device has switched from standby to active. for v cch and v ccl values see electrical characteristics . if 0 v < v cc < v ccon , the device is in standby and output gtdrv is active low. absolute maximum ratings parameter symbol limit values unit notes min. max. supply voltage at v cc pin 8 supply + z-current v cc -gnd pin 8 current into gtdrv pin 7 clamping current into gtdrv pin 7 clamping current into gtdrv pin 7 v cc i ccz i gtdrv i gtdch i gtdcl C 0.3 0 C 400 C C 100 C 70 500 100 C v ma ma ma ma C observe p max observe p max v gtdrv > v cc v gtdrv < C 0.3 v voltage at v sense pin 1 voltage at v aout pin 2 voltage at multin pin 3 voltage at i sense pin 4 current into detin pin 5 current into detin pin 5 v vsense v vaout v multin v isense i detinh i detinl C 0.3 C 0.3 C 0.3 C10 C C10 17 6 17 17 50 C v v v v ma ma C C C C v detin >6 v v detin < 0.9 v junction temperature t j C 40 150 cC storage temperature t stg C 50 150 cC thermal resistance system-air tda 4862 tda 4862 g r thsa r thsa C C 100 180 k/w k/w p-dip-8-1 p-dso-8-1 parameter symbol limit values unit notes min. max. supply voltage v cc v ccon v z v 1) z-current i z 0 50 ma observe p max junction temperature t j C 40 150 cC voltage at i sense v isense C 5 v z vC
tda 4862 semiconductor group 10 1998-02-16 electrical characteristics unless otherwise stated, v cc = 12 v, C 40 c < t j < 150 c. parameter symbol limit values unit test condition min. typ. max. overall supply current, off i ccl C 75 200 m a 0 v < v cc < v cch supply current, on i cch C 4 6 ma output low supply current, dynamic i ccdy C 4.2 8 ma f detin = 50 khz, c gtdrv = 1 nf v cc turn-on threshold v cch C 11 11.5 v C v cc turn-off threshold v ccl 8.0 8.5 C v C v cc turn-on/off hysteresis v cchy 1.8 2.3 3.0 v C v cc clamp v z 15 17 19 v i ccz = 50 ma voltage amplifier voltage feedback threshold v fb 2.465 2.5 2.53 5 v t j = 25 c, pin 1 to pin 2 voltage feedback threshold v fb 2.45 C 2.55 v pin 1 to pin 2 line regulation d v fbl CC 5mv v cc = 10 v to 15 v input bias current i bvsense C1 C C m aC open loop voltage gain 1) g v C 80 C db C unity gain bandwidth 1) b w C 0.8 C mhz C phase margin 1) f m C 80 C degr C inhibit threshold voltage v vaouti C 2.2 C v C output current source i vaouth C C 12 C ma v vaout = 0 v, v vsense = 2.3 v output current sink i vaoutl C4 Cma v vaout = 4 v, v vsense = 2.8 v 1) guaranteed by design, not 100 % tested in production.
tda 4862 semiconductor group 11 1998-02-16 output voltage swing high state v vaouth 3.8 4.3 5.0 v i vaout = C 0.2 ma v vsense = 2.3 v output voltage swing low state v vaoutl C 0.9 C v i vaout = 0.5 a v vsense = 2.8 v overvoltage regulator regulation current i rvaout 20 30 45 m a v vaout = v multin = 4 v, v isense = 0.5 v current comparator input bias current i bisense C1 C C m aC input offset voltage v isenseo C25 Cmv v multin = 0 v, v vaout = 2.4 v max threshold voltage v isensem 1.05 1.25 1.5 v C delay to output 1) t phl C 250 C ns C detector upper threshold voltage ( v detin increasing) v detinu C 2.5 2.75 v C lower threshold voltage ( v detin decreasing) v detinl 1.5 1.9 C v C hysteresis v detinhy C 0.6 C v C input current i bdetin C1 C C m a 1.5 v < v detin < 2.75 v input clamp voltage high state low state v detinhc v detinlc 4 C 5 0.6 C 1 v v i detin = 5 ma i detin = C 5 ma 1) guaranteed by design, not 100 % tested in production. electrical characteristics (contd) unless otherwise stated, v cc = 12 v, C 40 c < t j < 150 c. parameter symbol limit values unit test condition min. typ. max.
tda 4862 semiconductor group 12 1998-02-16 1) k = v isense / ( v multin ( v vaout C v fb )) 2) guaranted by design, not 100% tested in production. multiplier input bias current i bmultin C 1 C C m aC dynamic voltage range multin v aout v multin v vaout 0 to 3 v fb to v fb + 1 0 to 4 v fb to v fb + 1.5 C C v v v vaout = 2.75 v v multin = 1.0 v multiplier gain 1) k 0.45 0.65 0.85 1/v v multin = 2 v v vaout = v fb + 1 v restart timer restart time delay t dly 75 190 400 m sC gate driver output voltage low state v gtdrvl C 0.8 1.8 Cv v i gtdrv = 20 ma i gtdrv = 200 ma output voltage high state v gtdrvh C 9.4 8.7 Cv i gtdrv = C 20 ma i gtdrv = C 200 ma output voltage active shut down v gtdrvu C 2.0 2.6 v i gtdrv = 50 ma v cc increasing: 0 < v cc < v cch , v cc decreasing: 0 < v cc < v ccl rise time 2) t r C 100 C C c gtdrv = 1 nf fall time 2) t f C40 CC c gtdrv = 1 nf electrical characteristics (contd) unless otherwise stated, v cc = 12 v, C 40 c < t j < 150 c. parameter symbol limit values unit test condition min. typ. max.
tda 4862 semiconductor group 13 1998-02-16 supply current i cc versus supply voltage v cc turn-on/-off threshold voltage v cc versus junction temperature t j supply current i cc versus junction temperature t j open loop gain g v and phase f versus frequency f 0 0 5 10 15 v v cc 20 vsense v = 3 v ma i cc 6 ied01751 5 4 3 2 1 = 3 v vaout v = 1 v multin v = 0.5 v isense v = 2 v detin v = 25 c j t -50 7 8 9 10 0 50 100 c t j ccl v v 11 12 cch v ied01753 v cc 150 -50 0 0 50 100 c t j 150 vsense v = 3 v ma i cc 6 ied01752 5 4 3 2 1 = 3 v vaout v = 1 v multin v = 0.5 v isense v = 2 v detin v 0 20 40 60 f m 2 f 4 f cc 100 g v a db 80 j t 0 v v vaout ied01754 = 25 c 3.0 < < 3.5 v = 12 v khz 10 10 0 30 60 90 120 150 f deg 10 0 10 -1 10 -2 1 10
tda 4862 semiconductor group 14 1998-02-16 threshold voltage change d v fb versus junction temperature t j threshold voltage v detin versus junction temperature t j threshold voltage v isense versus regulation current i rvaout current sense threshold v isense versus multiplier input v multin -50 -15 -10 -5 0 0 50 100 c t j mv 5 10 ied01755 v fb 150 d cc v = 12 v pin 1 connected to pin 2 -50 0 0 50 100 c t j 150 1/v 3.00 ied01757 2.75 2.50 2.25 2.00 1.75 = 12 v cc v = 1 v multin v = gnd vsense v = gnd isense v detin v detinupper v v detinlow 29 0.4 0.2 0 0.6 32 31 30 0.8 1.0 1.4 rvaout i 34 ied01756 33 m a v cc =12 v v v isense 150 c 25 c -40 c 0.8 0 0.4 0.2 0 0.6 3 2 1 1.0 1.4 5 ied01758 4 v v v isense multin v 4.0 v 3.5 v 3.0 v 2.75 v vaout v = 2.5 v
semiconductor group 15 1998-02-16 current sense threshold v isense versus voltage amplifier output v vaout restart time delay t dly versus junction temperature t j multiplier gain k versus junction temperature t j output voltage low/high state v sat versus load current i gtdrv 0.8 2.5 0.4 0.2 0 0.6 4.0 3.5 3.0 1.0 1.4 5.0 ied01759 4.5 v v v isense vaout v multin v = 3 v 2 v 1 v 0.5 v -50 140 0 50 100 c t j 150 s 240 ied01761 180 200 160 t dly 220 m -50 0 0 50 100 c t j 150 cc v 1/v 1.2 ied01760 0.6 multin v vaout v 0.9 0.3 k = 12 v = 2 v = vfb + 1 v 0 0 100 200 300 ma v sat 400 cc v = 12 v v i gtdrv 6 ied01762 5 4 3 2 1 = 10 ms t = 200 s p t m cc vv gtdrvh gtdrvl v gtdrvl v at cc v = 7 v tda 4862
tda 4862 semiconductor group 16 1998-02-16 package outlines plastic package, p-dip-8-1 (plastic dual in-line package) gpd05025 sorts of packing package outlines for tubes, trays etc. are contained in our data book package information. dimensions in mm
tda 4862 semiconductor group 17 1998-02-16 gps05121 plastic package, p-dso-8-1 (plastic dual small outline package) sorts of packing package outlines for tubes, trays etc. are contained in our data book package information. dimensions in mm smd = surface mounted device

▲Up To Search▲

Price & Availability of Q67000-A8368-A205

	To Download Q67000-A8368-A205 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .